Full chip PD

• Experience with advanced process nodes (7nm, 5nm, 3nm).
• Knowledge of low-power design techniques.
• Experience in managing full-chip tapeouts.
• Strong scripting skills (TCL, Perl, Python) for automation of design tasks.
• In-depth understanding of VLSI design principles.
• Experience with floorplanning, placement, routing, and optimization techniques.
• Strong knowledge of timing analysis and closure methodologies.
• Familiarity with DRC, LVS, and sign-off verification processes.
• Excellent problem-solving skills and ability to work in a collaborative environment.